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XCM-107 series Breadboard with Virtex-5 LXT FFG665

By
FPGA overviewXC5VLX30TXC5VLX50T
Slices4,8007,200
Logic Cells30,72046,080
Maximum Distributed RAM Bits320 K480 K
Total Block RAM Bits1,296 K2,160 K
Maximum user I / O pins (Device)360360
Maximum user I / O pins ( Board )128128
DCMsFour12
PLLs26
DSP48As3248

  Equipped with XC5VLX30T-1FFG665C or XC5VLX50T-1FFG665C
  ■ Abundant I / O extraction (128)
  ■ Equipped with large capacity SPI flash ROM (ISP possible with iMPACT)
  ■ Onboard clock
   30MHz, 50MHz (LVTTL)
  ■ Rocket IOevaluation Possible TX / RX: 2 sets (125MHz, 150MHz, LVDS reference clock installed)
    125 / 150MHz and communication standard
  Equippedwith 7-pin JTAG connector that allows configuration to FPGA and ISP to ROM
  ■ Stable with JTAG Buffer circuit Realized download
  ■ 3.3V single power supply operation
   1.0V, 1.2V, 2.5V generated in the board
  ■ VCCO can be used separately for one system (tested at 3.3V at the time of manufacture)
  ■ Reset function for configuration
  ■ Half card size    54mmX43mm RoHS directive compliant